Method for fabricating circuit pattern of printed circuit board

ABSTRACT

A circuit pattern fabrication method of a printed circuit board includes: a first step of forming a resin layer at a surface of an insulation material; a second step of selectively removing the resin layer; a third step of forming a metal plated layer at the surface of the resin layer-removed portion of the insulation material to form circuit patterns and a connection pad; and a fourth step of forming a gold plated layer on the connection pad. By doing that, a fine circuit pattern can be easily formed.

BACKGROUND OF THE INVENTION

[0001] 1. Field of the Invention

[0002] The present invention relates to a printed circuit board and,more particularly, to a method for fabricating a circuit pattern of aprinted circuit board that is capable of easily forming a fine pitchcircuit pattern and improving a reliability.

[0003] 2. Description of the Background Art

[0004]FIGS. 1A to 1J are sequential process of a method for fabricatinga circuit pattern of a printed circuit board in accordance with aconventional art.

[0005] The process of fabricating a circuit pattern of a printed circuitboard in accordance with a conventional art will now be described withreference to FIGS. 1A to 1J.

[0006] First, as shown in FIG. 1A, a base material 10 is prepared. Thebase material 10 is formed by coating a copper foil 16 at both sides ofan insulation material 12 with a predetermined thickness.

[0007] With reference to FIG. 1B, a plurality of through holes 18 areformed in the base material 10. The through holes 18 serve as a path forelectrically connecting the copper foil coated at both sides of theinsulation material 12, and as such it can be formed with various sizesand as many as desired according to a circuit design.

[0008] And then, as shown in FIG. 1C, after the through holes 18 areformed, a copper plated layer 20 is formed at a surface of the basematerial 10. That is, the copper plated layer 20 is formed also at theinner surface of the through holes 18 as well as at the surface of thecopper foil 16, electrically connecting the copper foil 16 formed atboth sides of the insulation material 12.

[0009] And, as shown in FIGS. 1D and 1E, an etching resist 22 is coatedat the surface of the copper plated layer 20, which is then exposed. Theexposing process is performed such that an exposing mask 26 with aplurality of openings 24 is positioned at both surfaces of the basematerial 10 with the etching resist 22 coated thereon, on whichultraviolet ray is irradiated, so that the ultraviolet ray is partiallyirradiated at the etching resist 22 through the openings 24 formed atthe exposing mask 26.

[0010] When the exposing process is completed, as shown in FIG. 1F, adevelopment process proceeds to remove the etching resist 22 of theexposed portion. That is, the etching resist at the portion to whichultraviolet ray has been irradiated is removed to expose the copperplated layer 20, while the etching resist 22 without ultravioletirradiated thereto as being covered by the exposed mask 26 remains, notexposing the copper plated layer 20.

[0011] After the development process is completed, as shown in FIG. 1G,an etching process proceeds to remove the exposed copper plated layer 20and the copper foil 16.

[0012] And then, as shown in FIG. 1H, the remaining etching resist 22 isremoved. Then, the copper plated layer 20 remaining at both surfaces ofthe insulation 12 by being protected by the etching resist 22 and thecopper foil 16 form a circuit patterns 28.

[0013] As the etching resist 22 is removed, as shown in FIG. 1I, a resinis plugged in the through hole 18 and regions between the circuitpatterns 28 to form a resin layer 30. And then, a photoresist 34 iscoated at a surface of the resin layer 30. At this time, some of thecircuit patterns 28 are used as a connection pad 32 for electricalconnection with outside and the photoresist 34 is not coated at thecircuit pattern used as the connection pad 32.

[0014] That is, circuit patterns 28 are formed by the copper foil 16 andthe copper plated layer 20 at both surfaces of the insulation material12, and electrically connected to each other by the copper plated layer20 coated at the inner surface lo of the through holes 18.

[0015] And then, as shown in FIG. 1J, a gold-plated layer 36 is formedon the portion of the connection pad 32 for connection to otherelectronic parts. The gold-plated layer 36 serves to ensure a firmattachment when a gold wire is connected to the connection pad 32 or asolder ball is formed on the connection pad 32.

[0016]FIG. 2 is a partial perspective view of the printed circuit boardin accordance with the conventional art, and FIG. 3 is a sectional viewshowing the connection pad 32 with the gold plated layer 36 formedthereon in accordance with the conventional art.

[0017] To sum up, the printed circuit board in accordance with theconventional art has a structure that the circuit patterns 28 are formedat the surface of the insulation layer 12, on which the photoresist 34is coated, and the gold plated layer 36 is formed at the connection pad32, where no photoresist 34 is coated, for connecting with otherelectronic parts.

[0018] A printed circuit board such as a flip chip package or a chipscale package (CSP) having almost the same size as the semiconductorchip is in demand increasingly, and the connection pad is in thetendency of sharply increase in number as the semiconductor chip is ofhigh density. Accordingly, in order to form more circuit patterns in thesame area for a signal transmission with the semiconductor chip, thewidth and the thickness of the circuit pattern is reduced and a spacebetween circuit patterns becomes fine.

[0019] However, the circuit pattern fabrication method of a printedcircuit board in accordance with the conventional art has the followingproblems.

[0020] That is, first, because the circuit pattern 28 or the connectionpad 32 is formed through the etching process, its bottom portionattached at the insulation layer 12 is relatively wide and becomesnarrow as it goes to the upper portion, causing a problem that it isdifficult to attach the gold wire or the solder ball.

[0021] In other words, in the etching process, an etching solutionpermeates from the upper portion of the connection pad 32 to its lowerportion, so that the upper portion of the connection pad is more removedthan the lower portion as the upper portion is exposed by the etchingsolution longer time than the lower portion, leaving a trapezoid shape.Thus, there is a limitation to form a fine circuit pattern 28 or aconnection pad 32 in terms of thickness and width.

[0022] Second, because the circuit pattern 28 and the connection pad 32are first formed and then the resin layer 30 or the solder resist iscoated, the surface flatness is degraded due to the existence of theprotruded circuit pattern 28 and the connection pad 32, resulting in ahigh possibility that the solder resist 30 may be cracked due to athermal impact, and when a semiconductor chip is molded at the printedcircuit board, a flow of the molding compound is not good.

[0023] Third, as shown in FIG. 3, the upper surface and the left andright surfaces of the connection pad 32 are exposed on which the copperplated layer 20 and the gold-plated layer 36 are formed. The gold-platedregion is relatively enlarged and the gold-plated layer 36 is formedlong in the downward direction of both sides of the connection pad 32,causing much problem for insulation between the adjacent connectionpads. In addition, the thickness of the copper plated layer 20 and thegold plated layer 36 formed at the side makes it difficult to obtain afine pitch.

SUMMARY OF THE INVENTION

[0024] Therefore, an object of the present invention is to provide amethod for fabricating a printed circuit board capable of easily forminga fine circuit pattern.

[0025] Another object of the present invention is to provide a methodfor fabricating a printed circuit board capable of considerably reducingdeficiency occurrence by improving a surface flatness of a printedcircuit board and reducing a molding gap in a molding operation after achip is mounted.

[0026] Still another object of the present invention is to provide amethod for fabricating a printed circuit board capable of minimizing agold plated area by forming a gold plated layer only at an upper surfaceof a connection pad and obtaining a fine pitch between connection pads.

[0027] To achieve these and other advantages and in accordance with thepurpose of the present invention, as embodied and broadly describedherein, there is provided a circuit pattern fabrication method of aprinted circuit board including: a first step of forming a resin layerat a surface of an insulation material; a second step of selectivelyremoving the resin layer; a third step of forming a metal plated layerat the surface of the resin layer-removed portion of the insulationmaterial to form circuit patterns and a connection pad; and a fourthstep of forming a gold plated layer on the connection pad.

[0028] In the circuit pattern fabrication method of a printed circuitboard of the present invention, the metal plated layer is formed by acopper plating.

[0029] In the circuit pattern fabrication method of a printed circuitboard of the present invention, the third step includes: forming a metalplated layer at a surface of the insulation material and at a surface ofthe remaining resin layer; removing the metal plated layer formed at thesurface of the resin layer; and coating a solder resist at a surface ofother portion than the portion where the connection pad is formed.

[0030] In the circuit pattern fabrication method of a printed circuitboard of the present invention, the metal plated layer formed at thesurface of the resin layer is removed by abrasion, and the resin layerand the metal plated layer are leveled through the abrasion process.

[0031] In the circuit pattern fabrication method of a printed circuitboard of the present invention, the connection pad is formed in arectangular shape without having a difference in width between a bottomportion attached at the insulation material and the upper portion.

[0032] In the circuit pattern fabrication method of a printed circuitboard of the present invention, the gold-plated layer is formed only atthe upper surface of the connection pad.

[0033] To achieve the above objects, there is also provided a method forfabricating a circuit pattern of a printed circuit board including: afirst step of preparing an insulation material having a plurality ofthrough holes; a second step of forming a resin layer at both surfacesof the insulation material; a third step of selectively removing theresin layer and forming a metal plated layer at both surfaces of theinsulation material where the resin layer has been removed to formcircuit patterns and a connection pad, and forming a metal plated layerinside the through hole to electrically connect the circuit patternsexisting at both sides; and a fourth step of forming a gold plated layeron the connection pad.

[0034] To achieve the above objects, there is also provided a method forfabricating a circuit pattern of a printed circuit board including: afirst step of forming a resin layer at a surface of an insulationmaterial; a second step of selectively removing the resin layer to forma plurality of grooves; a third step of forming a metal plated layer onthe groove to form circuit patterns and a connection pad; a fourth stepof forming a gold plated layer at a surface of the connection pad; and afifth step of removing the gold plated layer protruded from the surfaceof the resin layer.

[0035] In the method for fabricating a circuit pattern of a printedcircuit board of the present invention, the third step includes: forminga metal plated layer inside the groove and at the surface of the resinlayer; and removing the metal plated layer formed at the surface of theresin layer to form a connection pad and circuit patterns.

[0036] In the method for fabricating a circuit pattern of a printedcircuit board of the present invention, the metal plated layer formed atthe surface of the resin layer is removed by abrasion.

[0037] In the method for fabricating a circuit pattern of a printedcircuit board of the present invention, the connection pad is formedwith a thickness not higher than a depth of the groove, and an edge ofthe connection pad is protruded upwardly so as to be attached at theinner surface of the groove.

[0038] In the method for fabricating a circuit pattern of a printedcircuit board of the present invention, in the fifth step, the resinlayer is abraded to a certain thickness in order to remove the goldplated layer protruded from the resin layer and flatten the surface ofthe resin layer.

[0039] The foregoing and other objects, features, aspects and advantagesof the present invention will become more apparent from the followingdetailed description of the present invention when taken in conjunctionwith the accompanying drawings.

BRIEF DESCRIPTION OF THE DRAWINGS

[0040] The accompanying drawings, which are included to provide afurther understanding of the invention and are incorporated in andconstitute a part of this specification, illustrate embodiments of theinvention and together with the description serve to explain theprinciples of the invention.

[0041] In the drawings:

[0042]FIGS. 1A to 1J are a sequential process of a method forfabricating a circuit pattern of a printed circuit board in accordancewith a conventional art;

[0043]FIG. 2 is a partial perspective view showing a printed circuitboard in accordance with the conventional art;

[0044]FIG. 3 is a sectional view taken along line III-III of FIG. 2;

[0045]FIGS. 4A to 4H are a sequential process of a method forfabricating a circuit pattern of a printed circuit board in accordancewith a first embodiment of the present invention;

[0046]FIG. 5 is a partial perspective view showing a printed circuitboard in accordance with the first embodiment of the present invention;

[0047]FIG. 6 is a sectional view taken along line VI-VI of FIG. 5; and

[0048]FIGS. 7A to 7E are a sequential process of a method forfabricating a circuit pattern of a printed circuit board in accordancewith a second embodiment of the present invention.

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0049] Reference will now be made in detail to the preferred embodimentsof the present invention, examples of which are illustrated in theaccompanying drawings.

[0050]FIGS. 4A to 4H are a sequential process of a method forfabricating a circuit pattern of a printed circuit board in accordancewith a first embodiment of the present invention.

[0051] The method for fabricating a circuit pattern of a printed circuitboard in accordance with a first embodiment of the present inventionwill now be described with reference to FIGS. 4A to 4H.

[0052] First, with reference to FIG. 4A, an insulation material 50 witha predetermined thickness is prepared. The insulation material serves asa base material of a printed circuit board with a certain thickness andarea.

[0053] Next, as shown in FIG. 4B, a plurality of through holes 52 areformed at the insulation material 50. The through hole 52, serving as aconnection path for electrically connecting circuit patterns formed atboth surfaces of the insulation material 50, can be formed by amechanical method using a drill or a laser or a chemical method.

[0054] After the through hole 52 is formed, as shown in FIG. 4C, resinis coated at both surfaces of the insulation material 50 to form a resinlayer 54. The resin layer 54 is not formed inside the through hole 52formed at the insulation material 50.

[0055] And then, as shown in FIG. 4D, the resin layer 54 is selectivelyremoved. That is, the resin layer 54 is selectively removed from theportions where the through hole 52 has been formed and a circuit patternis to be formed. At this time, the resin layer 54 can be removed throughvarious method such as an exposing/developing method using ultraviolet,a method using laser or a mechanical routing method.

[0056] After the resin layer 54 is selectively removed, as shown in FIG.4E, a metal plated layer 56 is formed at a surface of the insulationmaterial 50. That is, the metal plated layer 56 is formed at the surfaceof the exposed insulation material 50, the surface of the resin layer 54and inside wall of the through hole 52.

[0057] And then, as shown in FIG. 4F, the metal plated layer 56 formedat the surface of the resin layer 54 is removed by grinding. That is,the metal plated layer 56 is abraded with a certain depth so as to beremoved. At this time, the resin layer 54 is also abraded to a certaindegree to better a flatness of the overall surface.

[0058] After the abrading process is completed, the metal plated layer56 remaining at the surface of the insulation material 50 becomes acircuit pattern 60 or a connection pad 62. Meanwhile, the metal platedlayer 56 formed inside wall of the through hole 52 serves toelectrically connect the circuit patterns 60 formed at both surfaces ofthe insulation material 50.

[0059] And then, as shown in FIG. 4G, a solder resist 68 is coated at asurface of the exposed circuit pattern 60 and the resin layer 54. Atthis time, the solder resist 68 is plugged also inside the through hole52. As the solder resist 68, a photo solder resist is used.

[0060] The solder resist 68 is not coated at the portion of theconnection pads 62 such as a bonding pad and a ball pad for electricalconnection with other electronic parts, so that the connection pads isare exposed.

[0061] And then, as shown in FIG. 4H, a gold plated layers 70 are formedat an exposed surface of the connection pads 62, thereby completing aprinted circuit board. The gold plated layers 70 make the connectionwire or the solder ball to be firmly attached to the connection pads 62to ensure electrical connection therebetween.

[0062]FIG. 5 is a partial perspective view showing a printed circuitboard in accordance with the first embodiment of the present invention,and FIG. 6 is a sectional view taken along line VI-VI of FIG. 5.

[0063] A printed circuit board 80 fabricated according to a firstembodiment of the present invention is featured in that the plurality ofconnection pads 62 are consecutively arranged at regular intervals, theresin layer 54 is plugged between the connection pads 62, and the resinlayer 54, the connection pad 62 and the circuit patterns 60 are formedwith the same height, so that a completed printed circuit board 80 has aplane surface.

[0064] The operation and effect of the printed circuit board completedaccording to the fabrication process will now be described.

[0065] In the circuit pattern fabrication method in accordance with oneembodiment of the present invention, the resin layer 54 is coated at thesurface of the insulation material 50 and partially removed, the metalplated layer 56 is formed at the surface of the resin layer 54 and theexposed surface of the insulation material 50, and then, the metalplated layer 56 formed on the resin layer 54 is removed through theabrading process, to form the circuit patterns 60 and the connectionpads 62. Accordingly, as shown in FIG. 6, there is no width differentbetween the bottom part attached at the insulation layer 50 of theconnection pads 62 and the exposed upper portion, forming a rectangulartype. Thus, it is easy to attach the gold wire or the solder ball at theupper surface of the connection pads 62 and the size of the connectionpads 62 can be reduced, so that a fine circuit pattern can be easilyformed.

[0066] In addition, the connection pads 62 are covered by the resinlayer 54, the gold plated layers 70 are formed only at the upper surfaceof the connection pads 62 in a gold plating operation. Accordingly,because the metal plated layer 56 and the gold plated layers 70 are notformed at the side of the connection pad pads 62, the connection pads 62can be relatively reduced in width, and accordingly, a pitch between theconnection pads 62 becomes narrow, facilitating forming of a finecircuit pattern.

[0067] In addition, because the resin layer 54 and the circuit patterns60 are formed to be level by the abrading process, the solder resist 68coated on the resin layer 54 and the circuit patterns 60 can have arelatively high flatness. Accordingly, when a printed circuit board witha chip mounted thereon is molded, a flow of molding compound is smoothlyperformed, so that generation of a mold gap can be reduced.

[0068] In addition, the metal plated layer 56 is formed at the surfaceof the insulation material 50 exposed as the resin layer 54 is removedtherefrom and then the abrading process is performed to flatten thesurface. Therefore, it is not necessary to control a deviation in athickness of the metal plated layer in its formation, so that aproductivity can be improved, a fabrication cost can be reduced, and anoperation is convenient to perform.

[0069]FIGS. 7A to 7E are a sequential process of a method forfabricating a circuit pattern of a printed circuit board in accordancewith a second embodiment of the present invention.

[0070] First, with reference to FIG. 7A, a resin layer 104 is formed onan insulation material 102 with a predetermined thickness and thenselectively removed. That is, the resin layer 104 at a portion where acircuit pattern is to be formed is selectively removed to form a groove106. At this time, the resin layer 104 can be removed by various methodssuch as the exposing/developing method using ultraviolet ray, a methodusing laser or a mechanical routing method.

[0071] After the resin layer 104 is selectively removed, as shown inFIG. 7B, a metal plated layer 108 is formed at a surface of theinsulation material 102. At this time, the metal plated layer 108 isformed at the exposed surface of the insulation material 102 and thesurface of the resin layer 104 by using a chemical plating method.

[0072] And then, as shown in FIG. 7C, the metal plated layer 108 formedat the surface of the resin layer 104 is removed. That is, the metalplated layer 108 formed at the surface of the resin layer 104 is abradedto a certain depth so as to be removed. After the abrading process, themetal plated layer remaining at the surface of the insulation material102 becomes a connection pad 116 or circuit patterns (not shown).

[0073] In this respect, the groove 106 is formed with a predetermineddepth in the resin layer 104 and the connection pad 116 is formed with athickness smaller than the depth of the groove 106, so that the uppersurface of the connection pad 116 is positioned at the inner side of thegroove 106. Accordingly, an edge of the connection pad 116 is protrudedupwardly and attached at the inner wall surface of the groove 106.

[0074] And then, as shown in FIG. 7D, a gold plated layer 110 is formedat the exposed surface of the connection pad 116. The gold plated layer110 is formed by an electroplating method supplying power to theconnection pad 116 exposed at the surface of the resin layer 104.

[0075] Because the connection pad 116 is positioned at the inner side ofthe groove 106 and its edge is protruded, an edge of the gold platedlayer 110 is attached to the protruded edge of the connection pad 116.

[0076] After the gold plated layer 110 is formed, as shown in FIG. 7E,the resin layer 104 is abraded to a predetermined thickness so that thegold plated layer 110 protruded from the surface of the resin layer 104is removed and the surface of the resin layer 104 can be flattened.

[0077] The gold plated layer 110 makes the connection wire or the solderball be firmly attached to the connection pad 116 to ensure an electricconnection.

[0078] As stated above, the circuit pattern fabrication method inaccordance with the second embodiment of the present invention has thefollowing advantages.

[0079] That is, first, because the edge of the connection pad 116 isprotruded upwardly and attached inside the groove 106 formed on theresin layer 104, the gold plated layer 110 can be coated in a wide area.Accordingly, the gold wire or the solder ball can be easily attached atthe upper surface of the connection pad 116, and because the connectionpad 116 can be reduced in size, a fine circuit pattern can be easilyformed.

[0080] Second, the edge of the connection pad 116 is protruded and theedge of the gold plated layer 110 is attached to the edge of theconnection pad 116 during the gold plating operation. Thus, the width ofthe connection pad 11 can be relatively reduced, and accordingly, thepitch between the connection pads 116 can become narrow, so that a finecircuit pattern can be easily formed.

[0081] Third, after the gold plated layer 110 is formed, the abradingprocess is performed to flatten the surface. Thus, it is not necessaryto control a deviation in thickness of the gold plated layer in itsformation, so that a productivity can be improved, a fabrication costcan be reduced, and an operation is convenient to perform.

[0082] As the present invention may be embodied in several forms withoutdeparting from the spirit or essential characteristics thereof, itshould also be understood that the above-described embodiments are notlimited by any of the details of the foregoing description, unlessotherwise specified, but rather should be construed broadly within itsspirit and scope as defined in the appended claims, and therefore allchanges and modifications that fall within the metes and bounds of theclaims, or equivalence of such metes and bounds are therefore intendedto be embraced by the appended claims.

What is claimed is:
 1. A circuit pattern fabrication method of a printedcircuit board comprising: a first step of forming a resin layer at asurface of an insulation material; a second step of selectively removingthe resin layer; a third step of forming a metal plated layer at thesurface of the resin layer-removed portion of the insulation material toform circuit patterns and a connection pad; and a fourth step of forminga gold plated layer on the connection pad.
 2. The method of claim 1,wherein the metal plated layer is formed by a copper plating.
 3. Themethod of claim 1, wherein the third step comprises: forming a metalplated layer at a surface of the insulation material and at a surface ofthe remaining resin layer; removing the metal plated layer formed at thesurface of the resin layer; and coating a solder resist at a surface ofother portion than the portion where the connection pad is formed. 4.The method of claim 3, wherein the metal plated layer formed at thesurface of the resin layer is removed by abrasion.
 5. The method ofclaim 4, wherein the resin layer and the metal plated layer are leveledthrough the abrasion process.
 6. The method of claim 1, wherein theconnection pad is formed in a rectangular shape without having adifference in width between a bottom portion attached at the insulationmaterial and the upper portion.
 7. The method of claim 1, wherein thegold-plated layer is formed only at the upper surface of the connectionpad.
 8. A method for fabricating a circuit pattern of a printed circuitboard comprising: a first step of preparing an insulation materialhaving a plurality of through holes; a second step of forming a resinlayer at both surfaces of the insulation material; a third step ofselectively removing the resin layer and forming a metal plated layer atboth surfaces of the insulation material where the resin layer has beenremoved to form circuit patterns and a connection pad, and forming ametal plated layer inside the through hole to electrically connect thecircuit patterns existing at both sides; and a fourth step of forming agold plated layer on the connection pad.
 9. The method of claim 8,wherein the metal plated layer is formed by a copper plating.
 10. Themethod of claim 8, wherein the third step comprises: forming a metalplated layer at a surface of the insulation material, at a surface ofthe resin layer and at the inner side the through hole; removing themetal plated layer formed at the surface of the resin layer; and coatinga solder resist at a surface of other portion than the portion where theconnection pad is formed.
 11. The method of claim 8, wherein the metalplated layer formed at the surface of the resin layer is removed byabrasion.
 12. The method of claim 11, wherein the resin layer and themetal plated layer are leveled through the abrasion process.
 13. Themethod of claim 8, wherein the connection pad is formed in a rectangularshape without having a difference in width between a bottom portionattached at the insulation material and the upper portion.
 14. Themethod of claim 8, wherein the gold-plated layer is formed only at theupper surface of the connection pad.
 15. A method for fabricating acircuit pattern of a printed circuit board comprising: a first step offorming a resin layer at a surface of an insulation material; a secondstep of selectively removing the resin layer to form a plurality ofgrooves; a third step of forming a metal plated layer on the groove toform circuit patterns and a connection pad; a fourth step of forming agold plated layer at a surface of the connection pad; and a fifth stepof removing the gold plated layer protruded from the surface of theresin layer.
 16. The method of claim 15, wherein the metal plated layerformed at the surface of the resin layer is removed by abrasion.
 17. Themethod of claim 15, wherein the third step comprises: forming a metalplated layer inside the groove and at the surface of the resin layer;and removing the metal plated layer formed at the surface of the resinlayer to form a connection pad and circuit patterns.
 18. The method ofclaim 17, wherein the metal plated layer is formed by a chemical platingmethod.
 19. The method of claim 17, wherein the metal plated layerformed at the surface of the resin layer is removed by abrasion.
 20. Themethod of claim 15, wherein the connection pad is formed with athickness not higher than a depth of the groove.
 21. The method of claim15, wherein an edge of the connection pad is protruded upwardly so as tobe attached at the inner surface of the groove.
 22. The method of claim15, wherein the gold plated layer is formed by an electroplating methodsupplying power to the connection pad.
 23. The method of claim 15,wherein, in the fifth step, the resin layer is abraded to a certainthickness in order to remove the gold plated layer protruded from theresin layer and flatten the surface of the resin layer.